64 lines
2.5 KiB
C
64 lines
2.5 KiB
C
// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// * Neither the name of NVIDIA CORPORATION nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Copyright (c) 2008-2023 NVIDIA Corporation. All rights reserved.
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// Copyright (c) 2004-2008 AGEIA Technologies, Inc. All rights reserved.
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// Copyright (c) 2001-2004 NovodeX AG. All rights reserved.
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#ifndef PX_WINDOWS_FPU_H
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#define PX_WINDOWS_FPU_H
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PX_INLINE physx::PxSIMDGuard::PxSIMDGuard(bool enable) : mEnabled(enable)
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{
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#if !PX_ARM && !PX_A64
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if (enable)
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{
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mControlWord = _mm_getcsr();
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// set default (disable exceptions: _MM_MASK_MASK) and FTZ (_MM_FLUSH_ZERO_ON), DAZ (_MM_DENORMALS_ZERO_ON: (1<<6))
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_mm_setcsr(_MM_MASK_MASK | _MM_FLUSH_ZERO_ON | (1 << 6));
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}
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else
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{
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PX_ASSERT(_mm_getcsr() & _MM_FLUSH_ZERO_ON);
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PX_ASSERT(_mm_getcsr() & (1 << 6));
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PX_ASSERT(_mm_getcsr() & _MM_MASK_MASK);
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}
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#endif
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}
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PX_INLINE physx::PxSIMDGuard::~PxSIMDGuard()
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{
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#if !PX_ARM && !PX_A64
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if (mEnabled)
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{
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// restore control word and clear any exception flags
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// (setting exception state flags cause exceptions on the first following fp operation)
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_mm_setcsr(mControlWord & ~_MM_EXCEPT_MASK);
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}
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#endif
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}
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#endif
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